diff -Nur linux-2.4.18/drivers/char/serial.c linux-2.4.18shsmod/drivers/char/serial.c --- linux-2.4.18/drivers/char/serial.c Tue Feb 26 04:37:57 2002 +++ linux-2.4.18shsmod/drivers/char/serial.c Fri Feb 21 03:40:49 2003 @@ -90,11 +90,19 @@ * Enable support for serial console port and serial * debug port as defined by the SPCR and DBGP tables in * ACPI 2.0. + * + * CONFIG_SHSMOD + * Enables support for High Speed mode, available with + * some SMC/NS/Winbond multi-I/O chips. */ #include #include +#define CONFIG_SHSMOD +/* #define DEBUG_CONFIG_SHSMOD */ +#define CONFIG_SHSMOD_VIA686A + #undef SERIAL_PARANOIA_CHECK #define CONFIG_SERIAL_NOPAUSE_IO #define SERIAL_DO_RESTART @@ -284,6 +292,14 @@ static void change_speed(struct async_struct *info, struct termios *old); static void rs_wait_until_sent(struct tty_struct *tty, int timeout); +#ifdef CONFIG_SHSMOD +static int enable_shsmod(struct serial_state * state); +static void disable_shsmod(void); +static int chip(int n,char opr); +static int ope(int n, char opr, int portNo); +static int via686a(int port, int mode, unsigned int *io); +#endif + /* * Here we define the default xmit fifo size used for each type of * UART @@ -3363,6 +3379,10 @@ " HUB-6" #define SERIAL_OPT #endif +#ifdef CONFIG_SHSMOD + " HighSpeedMode" +#define SERIAL_OPT +#endif #ifdef CONFIG_SERIAL_MANY_PORTS " MANY_PORTS" #define SERIAL_OPT @@ -4012,6 +4032,9 @@ rs_table[line].baud_base = base_baud; rs_table[line].dev = dev; } +#ifdef CONFIG_SHSMOD + disable_shsmod(); +#endif } #endif /* ENABLE_SERIAL_PCI || ENABLE_SERIAL_PNP */ @@ -5499,6 +5522,9 @@ state->port, state->irq, uart_config[state->type].name); } +#ifdef CONFIG_SHSMOD + enable_shsmod(state); +#endif tty_register_devfs(&serial_driver, 0, serial_driver.minor_start + state->line); tty_register_devfs(&callout_driver, 0, @@ -5636,6 +5662,9 @@ state->iomem_base ? "iomem" : "port", state->iomem_base ? (unsigned long)state->iomem_base : state->port, state->irq, uart_config[state->type].name); +#ifdef CONFIG_SHSMOD + enable_shsmod(state); +#endif tty_register_devfs(&serial_driver, 0, serial_driver.minor_start + state->line); tty_register_devfs(&callout_driver, 0, @@ -6005,6 +6034,355 @@ register_console(&sercons); } #endif + +#ifdef CONFIG_SHSMOD +/* + * High Speed mode patch for SMC chips by mizuhara@st.rim.or.jp + * Original idea and NT driver from gigo@os.rim.or.jp + * 09/98 updated by ytakeuch@po.iijnet.or.jp + * 02/99, 04/99 updated by ngonda@mb.kcom.ne.jp + * Visit http://www.os.rim.or.jp/~gigo/download.html + * 07/02 updated by cherry@klub.chip.pl + * 02/03 updated by tom@devdrv.com(http://www.devdrv.com/) + */ +#define PC87338 +/* +#define CHKENB +*/ + +#define _SHS_INTERNAL static +#define _SHS_CONST const + +#include "shstable.h" + +#include "shstable.c" + +#define outp( port, value ) outb( value, port ) +#define inp( port ) inb( port ) +#define _disable() cli() +#define _enable() sti() + + +#if 0 +/***** not used, comment only *****/ +unsigned short bios_port[5]; +static unsigned short std_port[4] = {0x3F8, 0x2F8, 0x3E8, 0x2E8}; +/********************************/ +#endif + +int divisor; +int ndev; +static unsigned int portAdr[3]; +int portStat[3]; + +#define print(_x_) printk _x_ + +#include "shschip.c" + +static int +enable_shsmod(struct serial_state * state) +{ + int result, n; + unsigned int uart = 0; + + /* find what type of controller is used */ + for (n = 1; idnt[n].type; n++) { + if ( chip(n, ' ') != -1 ) break; + } + if ( idnt[n].port == 0 ) { + printk("notfound index = %d\n", n); + return 0; + } + + printk("Serial chip = %s%s at %04xh\n", + fab[idnt[n].fab],idnt[n].name,idnt[n].port); + + if( idnt[n].pch == 0) { + printk("This chip doesn\'t have a high-speed serial mode = %d\n", n); + return 0; + } + if( idnt[n].pch == 4) { + printk("SHSMOD can't return to Low with this chip = %d\n", n); + } + + /* what port? ==> portAdr[1-4] */ + ope(n, ' ', 0); +#ifdef DEBUG_CONFIG_SHSMOD + printk("**STATE: %04xh => %04xh, %04xh\n", + (int)state->port, portAdr[1], portAdr[2]); +#endif + if (state->port) { + if (portAdr[1] == state->port ) + uart = 0x40; + else if ( portAdr[2] == state->port ) + uart = 0x80; + } + if (uart == 0) + return 0; + + /* try to enable High Speed mode */ + result = ope(n, 'H', uart); + if (result) { +#ifdef DEBUG_CONFIG_SHSMOD + printk("**Serial ope() Serial Speed Mode: High\n"); +#endif + /* set base baud for Winbond, NS */ + if (idnt[n].fab == 2 || idnt[n].fab == 3) + state->baud_base = 921600L; + } + else { +#ifdef DEBUG_CONFIG_SHSMOD + printk("**Serial ope() Disbale or Low\n"); +#endif + ; + } + + return result; +} + +static void +disable_shsmod(void) +{ + int result, n; + int uart = 0; + int portAdr[3]; + int i; + struct serial_state * state; + + for (i = 0, state = rs_table; i < NR_PORTS; i++,state++) { + if (state->type != PORT_16550A ) + continue; + + /* find what type of controller is used */ + for (n = 1; idnt[n].type; n++) { + if ( chip(n, ' ') != -1 ) break; + } + if ( idnt[n].port == 0 ) { + printk("notfound index = %d\n", n); + continue; + } + printk("(%s%s at %04xh\n",fab[idnt[n].fab],idnt[n].name,idnt[n].port); + + if( idnt[n].pch == 0) { + printk("This chip doesn\'t have a high-speed serial mode = %d\n", n); + continue; + } + if( idnt[n].pch == 4) { + printk("SHSMOD can't return to Low with this chip = %d\n", n); + continue; + } + + /* what port? ==> portAdr[1-4] */ + ope(n, ' ', 0); +#ifdef DEBUG_CONFIG_SHSMOD + printk("**Serial STATE: %04xh => %04xh, %04xh\n", + (int)state->port, portAdr[1], portAdr[2]); +#endif + if (state->port) { + if (portAdr[1] == state->port ) + uart = 0x40; + else if ( portAdr[2] == state->port ) + uart = 0x80; + } + if (uart == 0) + continue; + + /* try to disable High Speed mode */ + result = ope(n, 'L', uart); + + if (result) { +#ifdef DEBUG_CONFIG_SHSMOD + printk("**Serial ope() Serial Speed Mode: Low)\n"); +#endif + /* set base baud for Winbond, NS */ + if (idnt[n].fab == 2 || idnt[n].fab == 3) + state->baud_base = 115200L; + } + else { +#ifdef DEBUG_CONFIG_SHSMOD + printk("**Serial ope() no result\n"); +#endif + ; + } + } +} + +#ifdef CONFIG_SHSMOD_VIA686A + +#include +#include +#include +#include +#include + +/* #define DEBUG_SHSMOD_VIA686A 1 */ + +#ifdef DEBUG_SHSMOD_VIA686A +static unsigned char save_config; +#endif + +#define MODE_HI 2 +#define MODE_LO 1 +#define MODE_INQ 0 + +typedef unsigned char BYTE; +typedef unsigned short WORD; +typedef unsigned long DWORD; + +const unsigned short INX=0x3F0; +const unsigned short DAT=0x3F1; + +/* + * via686A() usage: + * + * port=0, mode=0 -- Chip detect mode, return (ID|Rev) or NONE + * port=[1|2|3], mode=0 -- Status detect mode, return status Reg. + * port=[1|2|3], mode=[1|2] -- Set mode, return status Reg. + */ + +static int via686a(int port, int mode, unsigned int *io) +{ + typedef unsigned char UCH; + UCH v; + int val = 0; + struct pci_dev *pcidev = NULL; + unsigned char confval; + +#if 0 +#define inp inb +#define outp(a,b) outb((b),(a)) +#endif + +#ifdef DEBUG_SHSMOD_VIA686A + printf("port = %d, mode = %d, io = %08x\n", port, mode, (unsigned int)io); +#endif + + pcidev = pci_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686, NULL); + if (pcidev) { + cli(); + /* start config */ + pci_read_config_byte(pcidev, 0x85, &confval); + + confval |= 0x2; + pci_write_config_byte(pcidev, 0x85, confval); + + outp(INX, 0xE0); + v = (UCH) inp(DAT); + val = v << 8; /* for INQ mode */ +#ifdef DEBUG_SHSMOD_VIA686A + printf("SuperI/O ID = %02x\n", v); +#endif + outp(INX, 0xE1); + v = (UCH) inp(DAT); + val |= v; /* for INQ mode */ +#ifdef DEBUG_SHSMOD_VIA686A + printf("SuperI/O Rev = %02x\n", v); +#endif + outp(INX, 0xEE); + v = (UCH) inp(DAT); +#ifdef DEBUG_SHSMOD_VIA686A + printf("Config Reg. = %02x\n", v); +#endif + if(port && mode) { /* Set mode & return status */ + port <<= 6; + if (mode == MODE_HI) + v |= port; + else if (mode == MODE_LO) + v &= ~port; + outp(INX, 0xEE); + outp(DAT, v); + outp(INX, 0xEE); + v = (UCH) inp(DAT); +#ifdef DEBUG_SHSMOD_VIA686A + printf("*Config Reg. = %02x\n", (int) v); +#endif + val = v & 0xC0; /* for return status */ + } + else if(port) { /* Inquire Status */ + outp(INX, 0xEE); + v = (UCH) inp(DAT); +#ifdef DEBUG_SHSMOD_VIA686A + printf("*Config Reg. = %02x\n", (int) v); +#endif + val = v & 0xC0; /* for return status */ + } + if (io) { /* IOport inq */ + + /* Serial Port1 Address */ + outp(INX, 0xE7); + v = (UCH) inp(DAT); + io[0] = (unsigned) (v << 2); +#ifdef DEBUG_SHSMOD_VIA686A + printf("COM1 Address = %04x\n", (v << 2)); +#endif + /* Serial Port3 Address */ + outp(INX, 0xE8); + v = (UCH) inp(DAT); + io[1] = (unsigned) (v << 2); +#ifdef DEBUG_SHSMOD_VIA686A + printf("COM2 Address = %04x\n", (v << 2)); +#endif + /* Get Function Select Register */ + outp(INX, 0xE2); + v = (UCH) inp(DAT); +#ifdef DEBUG_SHSMOD_VIA686A + printf("SIO Function = %04x\n", v); +#endif + if ((v & 0x04) == 0 ) { /* COM1 Disable */ +#ifdef DEBUG_SHSMOD_VIA686A + printf("COM1 is disabled\n"); +#endif + /* io[0] = 0; */ + } + if ((v & 0x08) == 0 ) { /* COM2 Disable */ +#ifdef DEBUG_SHSMOD_VIA686A + printf("COM2 is disabled\n"); +#endif + /* io[1] = 0; */ + } + + /* Get Serial Port Configuration */ + outp(INX, 0xEE); + v = (UCH) inp(DAT); + if (v & 0x3F) { /* Check COM2 use */ +#ifdef DEBUG_SHSMOD_VIA686A + printf("COM2 is not standard = %02x\n", (v & 0x3F)); +#endif + io[1] = 0; + } + + /* Power Down Control */ + outp(INX, 0xEF); + v = (UCH) inp(DAT); +#ifdef DEBUG_SHSMOD_VIA686A + printf("EF - Power Down Control = %x\n", v); +#endif + /* Serial Port Control */ + outp(INX, 0xF1); + v = (UCH) inp(DAT); +#ifdef DEBUG_SHSMOD_VIA686A + printf("F1 - Serial Port Control = %x\n", v); +#endif + } + + /*stop config*/ + confval &= ~0x2; + pci_write_config_byte(pcidev, 0x85, confval); + sti(); + } + return(val); +} + +#else /* !CONFIG_SHSMOD_VIA686A */ + +static int via686a(int port, int mode, unsigned int *io) +{ + return(0); +} + +#endif + +#endif /* CONFIG_SHSMOD */ /* Local variables: diff -Nur linux-2.4.18/drivers/char/shschip.c linux-2.4.18shsmod/drivers/char/shschip.c --- linux-2.4.18/drivers/char/shschip.c Thu Jan 1 09:00:00 1970 +++ linux-2.4.18shsmod/drivers/char/shschip.c Fri Feb 21 02:51:40 2003 @@ -0,0 +1,628 @@ +/* + * shschip.c + */ +/* SHSMODe -- Serial High Speed Mode enabler/patcher V1.91releas for Linux */ +/* Written by gigo http://homepage1.nifty.com/gigo/ (imaizumi@nisiq.net) */ +/* Modified and Distributed by Device Drivers Limited(tom@devdrv.com) */ +/* Special thanks for h-mio@mx5.nisiq.net */ +/* V1.0f Modified for Linux by mizuhara@acm.org */ +/* V1.6 Modified for Linux by ytakeuch@po.iijnet.or.jp */ +/* compiler DOS:MSC6.00A with /AH option, Linux:gcc */ +#ifndef _SHS_INTERNAL +#define _SHS_INTERNAL +#endif + +_SHS_INTERNAL +int chip(int n,char opr) +{ + int v, i; + unsigned int iop; + unsigned char id = 0; + unsigned char rev = 0; + +#if defined(DEBUG) + print(("%s\n",idnt[n].name)); +#endif + _disable(); /* cli */ + /* write ini value to enter config mode */ + if (idnt[n].type == 50) { /* is VIA ? */ + v = via686a(0, 0, 0); + id = (unsigned char) (v >> 8); + rev = (unsigned char) (v & 0xFF); + } + else if (idnt[n].type == 16 || idnt[n].type == 17) { /* is ITE ? */ + iop = idnt[n].type == 16 ? 0x279 : 0x02E; + outp(iop, idnt[n].id); + outp(iop, idnt[n].ini1); + outp(iop, idnt[n].ini2); + outp(iop, idnt[n].idx); + if(idnt[n].type == 16) + for(i = 0; i < 32; i++) + outp(idnt[n].port, pnpkey[i]); + outp(idnt[n].port, 0x20); + id = (unsigned char) inp(idnt[n].port+1); + } + else { + if (idnt[n].ini1) + outp(idnt[n].port,idnt[n].ini1); + if (idnt[n].ini2) + outp(idnt[n].port,idnt[n].ini2); + if (idnt[n].type != 8) { + outp(idnt[n].port,idnt[n].idx); + id = (unsigned char)inp(idnt[n].port+1); + } else { + outp(idnt[n].port+1,idnt[n].idx); + id = (unsigned char)inp(idnt[n].port+2); + } + } + switch (idnt[n].type) { + case 30: + outp(idnt[n].port,idnt[n].idx-1); + if (inp(idnt[n].port+1)!=0) + return -1; + outp(idnt[n].port,idnt[n].idx+1); + rev = (unsigned char)inp(idnt[n].port+1); + break; + case 31: + outp(idnt[n].port,idnt[n].idx-1); + if (inp(idnt[n].port+1)==0) + return -1; + outp(idnt[n].port,0x2c); + rev = (unsigned char)inp(idnt[n].port+1); + if (rev & 0x20) + ndev = 11; + else + ndev = 5; + outp(idnt[n].port,idnt[n].idx+1); + rev = (unsigned char)inp(idnt[n].port+1); + break; + default: + outp(idnt[n].port,idnt[n].idx+1); + rev = (unsigned char)inp(idnt[n].port+1); + break; + case 8: + case 9: + id = (unsigned char)(id&0xf); + rev = 0xff; + break; + case 20: + case 22: + case 28: + id = (unsigned char) (id & ~7); + rev = (unsigned char)(id & 7); + break; + case 21: + case 23: + rev = 0xff; + break; + case 50: + break; + case 16: + case 17: + outp(idnt[n].port, 0x21); + rev = (unsigned char) inp(idnt[n].port+1); + break; + } + if (idnt[n].fin) + outp(idnt[n].port,idnt[n].fin); /* exit config mode */ + if (idnt[n].type == 16 || idnt[n].type == 17) + outp(idnt[n].port+1,idnt[n].fin); /* exit config mode */ + _enable(); /* sti */ + + if (opr == 'C') + print(("*Check %s(%d): port=%04x, ini1=%02x, ini2=%02x, idx=%02x -> id=%02x, rev=%02x\n" + ,idnt[n].name,n,idnt[n].port,idnt[n].ini1,idnt[n].ini2,idnt[n].idx,id,rev)); + +#ifdef SHS_REVISION_RETURN + revision = rev; +#endif + if (idnt[n].id == id && idnt[n].type > 1) { /* ID matched ! */ + if (idnt[n].rev == rev) { + /* Revision matched exactly */ + return n; + } + else if (idnt[n].fab == 6) { /* ITE */ + print(("*ITE Chip ID = IT%02x%02x%s", id, rev, + (id == 0x87 && rev == 0x05 ? "/SiS950\n" : "\n"))); + return n; + } + else if (idnt[n].type > 2 && idnt[n].fab != 2) { + /* Neither Winbond nor 665IR/666IR/665GT/666GT */ + return n; + } /* Those are Winbond Check. */ + else if (idnt[n].rev == 0x00) + /* No revision check is needed */ + return n; + else if ((idnt[n].rev & 0x0F) == 0x00 + && idnt[n].rev == (unsigned char) (rev & 0xF0)) + /* Special revison check for Winbond */ + return n; + } + return -1; +} + +_SHS_INTERNAL +int ope(int n, char opr, int portNo) +{ + unsigned char cr1,cr2; + unsigned int iop; + int i,dvofs,nxt; + unsigned char r = 0; + unsigned char v = 0; +#if defined(BIOSCOM) + int j,warn; +#endif + typedef unsigned char UCH; + + if (opr == 'P') + return 0; + + switch(idnt[n].type) { + case 0: /* Unknown */ + case 1: /* 665GT,666GT */ + default: /* internal error.. */ + break; + case 2: /* 665IR,666IR */ + _disable(); /* cli */ + /* write ini value 2 times to enter config mode */ + outp(idnt[n].port,idnt[n].ini1); + outp(idnt[n].port,idnt[n].ini2); + outp(idnt[n].port,0x01); + cr1 = (unsigned char) inp(idnt[n].port+1); + outp(idnt[n].port,0x02); + cr2 = (unsigned char) inp(idnt[n].port+1); + /* select sr0c */ + outp(idnt[n].port,0x0c); + r = (unsigned char) inp(idnt[n].port+1); + if (opr == 'H') + r |= portNo; + if (opr == 'L') + r &= ~portNo; + outp(idnt[n].port+1,r); + r = (unsigned char) inp(idnt[n].port+1); + outp(idnt[n].port,idnt[n].fin); /* exit config mode */ + _enable(); /* sti */ + for (v=0x40,i=1;i<=2;++i) { + if (cr2 & 0x4) { + switch (cr2 & 0x3) { + case 00: portAdr[i]=0x3F8;break; + case 01: portAdr[i]=0x2F8;break; + case 02: + switch(cr1 & 0x30){ + case 0x00: portAdr[i]=0x338;break; + case 0x10: portAdr[i]=0x3E8;break; + case 0x20: portAdr[i]=0x2E8;break; + case 0x30: portAdr[i]=0x220;break; + } + break; + case 03: + switch(cr1 & 0x30){ + case 0x00: portAdr[i]=0x238;break; + case 0x10: portAdr[i]=0x2E8;break; + case 0x20: portAdr[i]=0x2E0;break; + case 0x30: portAdr[i]=0x228;break; + } + break; + } + portStat[i] = v&r; + } else { + portStat[i] = -1; + } + cr2 >>= 4; + v <<= 1; + } + break; + case 3: /* 669 */ + _disable(); /* cli */ + /* write ini value 2 times to enter config mode */ + outp(idnt[n].port,idnt[n].ini1); + outp(idnt[n].port,idnt[n].ini2); + outp(idnt[n].port,0x24); + portAdr[1] = (inp(idnt[n].port+1) & 0xFE) << 2; + outp(idnt[n].port,0x25); + portAdr[2] = (inp(idnt[n].port+1) & 0xFE) << 2; + /* select sr0c */ + outp(idnt[n].port,0x0c); + r = (unsigned char) inp(idnt[n].port+1); + if (opr == 'H') + r |= portNo; + if (opr == 'L') + r &= ~portNo; + outp(idnt[n].port+1,r); + r = (unsigned char) inp(idnt[n].port+1); + outp(idnt[n].port,idnt[n].fin); /* exit config mode */ + _enable(); /* sti */ + for (v=0x40,i=1;i<=2;++i) { + if (portAdr[i] & 0x300) + portStat[i] = v&r; + else + portStat[i] = -1; + v <<= 1; + } + break; + case 8: /* W83877TF native */ + case 9: /* W83877TF emulate mode */ + _disable(); /* cli */ + /* write ini value 2 times to enter config mode */ + outp(idnt[n].port,idnt[n].ini1); + if (idnt[n].type != 8) + outp(idnt[n].port,idnt[n].ini2); + else + idnt[n].port++; + outp(idnt[n].port,0x24); + portAdr[1] = (inp(idnt[n].port+1) & 0xFE) << 2; + outp(idnt[n].port,0x25); + portAdr[2] = (inp(idnt[n].port+1) & 0xFE) << 2; + /* select sr19 */ + outp(idnt[n].port,0x19); + r = (unsigned char) inp(idnt[n].port+1); + v = 0; + if (portNo & 0x40) + v = 0x2; + if (portNo & 0x80) + v |= 0x1; + if (opr == 'H') + r |= v; + if (opr == 'L') + r &= ~v; + outp(idnt[n].port+1,r); + r = (unsigned char) inp(idnt[n].port+1); + outp(idnt[n].port,idnt[n].fin); /* exit config mode */ + _enable(); /* sti */ + for (v=0x02,i=1;i<=2;++i) { + if (portAdr[i] & 0x300) + portStat[i] = v&r; + else + portStat[i] = -1; + v >>= 1; + } + if (idnt[n].type == 8) + idnt[n].port--; + break; + case 4: /* 67x,68x,93x,957 dev 4,5*/ + case 5: /* LPC47M172 */ + case 30: /* ALI M1543 dev 4,5*/ + case 31: /* ALI M1543C dev 4,5*/ + case 10: /* W83977TF dev 2,3*/ + case 20: /* NS PC8xxxxx dev 6,5*/ + case 21: /* NS PC9xxxxx dev 6,5*/ + case 22: /* NS PC8xxxxx dev 6,5*/ + case 23: /* NS PC9xxxxx dev 3,2*/ + switch(idnt[n].type) { /* dvofs */ + case 20: + case 21: + case 22: + dvofs = 6; /* 5:port2, 6:port1 87307/97037/87308/87317/97317 */ + nxt = -1; + break; + case 23: + dvofs = 3; /* 2:port2, 3:port1 87309 */ + nxt = -1; + break; + case 10: /* WinBond */ + dvofs = 2; /* 2:port1, 3:port2 */ + nxt = 1; + break; + case 31: /* ALI 1543C */ + dvofs = 4; /* 4:port1, 5:port2 */ + nxt = 1; + if (ndev == 11) + nxt = 7;/* 4:port1, 11:port2 */ + break; + case 5: /* LPC47M172 */ + dvofs = 3; /* 4:port1, 5:port2 */ + nxt = 2; + break; + default: /* SMC,ALI */ + dvofs = 4; /* 4:port1, 5:port2 */ + nxt = 1; + break; + } /* dvofs */ + + for (i = 1; i <=2 ; ++i, dvofs += nxt) { + _disable(); /* cli */ + /* write ini value 2 times to enter config mode */ + if (idnt[n].ini1) + outp(idnt[n].port,idnt[n].ini1); + if (idnt[n].ini2) + outp(idnt[n].port,idnt[n].ini2); + outp(idnt[n].port,0x07);/* Select device register */ + outp(idnt[n].port+1,dvofs); /* Set device value */ + outp(idnt[n].port,0x60); /* get port addr. */ + portAdr[i] = inp(idnt[n].port+1) << 8; + outp(idnt[n].port,0x61); + portAdr[i] |= inp(idnt[n].port+1); +#if defined(CHKENB) + outp(idnt[n].port,0x30); /* enabled ? */ + if (inp(idnt[n].port+1)==0) + portAdr[i] = 0; +#endif + outp(idnt[n].port,0xF0);/* Select serial config register */ + r = (unsigned char)inp(idnt[n].port+1); + switch (idnt[n].type) { + case 4: /* SMC */ + case 5: /* SMC */ + case 30: /* ALI */ + case 31: /* ALI 1543C */ + if ((0x20 << i) & portNo) { + if (opr == 'H') + r |= 2; + if (opr == 'L') + r &= ~2; + outp(idnt[n].port+1,r); + } + r = (unsigned char)inp(idnt[n].port+1); + v = (unsigned char)((r&0x3) == 0x2); + break; + case 10: /* Winbond 83977TF */ + if ((0x20 << i) & portNo) { + if (opr == 'H') + r |= 3; + if (opr == 'L') + r &= ~3; + outp(idnt[n].port+1,r); + } + r = (unsigned char)inp(idnt[n].port+1); + v = (unsigned char)((r&0x3) == 0x3); + break; + case 20: /* NS 87308 */ +#if 0 + if ((0x20 << i) & portNo) + if (opr == 'H') + outp(idnt[n].port+1,r|0x80); /* bank select enable */ + v = (unsigned char) (inp(idnt[n].port+1) & 0x80); + break; +#endif + case 21: /* NS */ + case 22: /* NS */ + case 23: /* NS */ + if ((0x20 << i) & portNo) { + if (opr == 'H') + outp(idnt[n].port+1,r|0x80); /* bank select enable */ + if (divisor>=0) { + v = (unsigned char)inp(portAdr[i] + 0x03); /* save LCR for 83708 */ + outp(portAdr[i] + 0x03 ,0xe0 ); /* Select Bank2 */ +/* outp(portAdr[i] + 0x02 ,0x41 ); *//* Select Extended mode */ + r = (unsigned char) inp(portAdr[i] + 0x04); + if (divisor==0) + outp(portAdr[i] + 0x04,r & 0x7F);/* clear LOCK */ + else { + outp(portAdr[i] + 0x04,r | 0x90);/* LOCK,1.625 */ + outp(portAdr[i] , divisor ); + outp(portAdr[i] + 1, divisor >> 8 ); + } + outp(portAdr[i] + 0x03 , v); /* Restore LCR */ + } + } + v = (unsigned char)(inp(idnt[n].port+1)&0x80); + break; + default: + break; + } /* switch */ + outp(idnt[n].port,idnt[n].fin); /* exit config mode */ + _enable(); /* sti */ + if (opr == 'C') + print(("*Check srf0/EXCR2: %02x -- ",r)); + if (portAdr[i]) + portStat[i] = v; + else + portStat[i] = -1; + } + break; +#if 1 /* defined(PC87338) */ + case 28: /* PC87338 */ + _disable(); + outp(idnt[n].port,0x00); /* get FER 3:FDC 2:SCC2 1:SCC1 0:PPA */ + cr1 = (unsigned char) inp(idnt[n].port+1); + + outp(idnt[n].port,0x01); /* get FAR 7:6-COM34 5:4-SCC2 3:2-SCC1 1:0-PPA */ + cr2 = (unsigned char) inp(idnt[n].port+1); + + for (i=1;i<=2;++i) { + if ((cr1 & (1 << i) )==0) { + portStat[i] = -1; + continue; + } + outp(idnt[n].port,0x1b); /* get PNP0 */ + if (inp(idnt[n].port+1) & 0x08) { /* PNP Mode */ + outp(idnt[n].port,0x42+2*i); + portAdr[i] = (inp(idnt[n].port+1)&0xfe) << 2; + outp(idnt[n].port,0x42+2*i+1); + portAdr[i] |= (inp(idnt[n].port+1)&0xfc) <<8; + } else { /* legacy mode */ + switch ((cr2>>(2*i)) & 0x03) { + case 00: portAdr[i]=0x3F8;break; + case 01: portAdr[i]=0x2F8;break; + case 02: /* com3 */ + switch(cr2 & 0xc0){ + case 0x00: portAdr[i]=0x3E8;break; + case 0x40: portAdr[i]=0x338;break; + case 0x80: portAdr[i]=0x2E8;break; + case 0xc0: portAdr[i]=0x220;break; + } + break; + case 03: /* com4 */ + switch(cr2 & 0xc0){ + case 0x00: portAdr[i]=0x2E8;break; + case 0x40: portAdr[i]=0x238;break; + case 0x80: portAdr[i]=0x2E0;break; + case 0xc0: portAdr[i]=0x228;break; + } + break; + } /* switch */ + } + if ((0x20 << i) & portNo) { + if (opr == 'H') { + outp(idnt[n].port,0x40); /* enable bank select */ + outp(idnt[n].port+1,inp(idnt[n].port+1)| (0x10 << (3*(i-1))) ); + } + if (divisor>=0) { + v = (unsigned char)inp(portAdr[i] + 0x03); /* save LCR for 83708 */ + outp(portAdr[i] + 0x03 ,0xe0 ); /* Select Bank2 */ +/* outp(portAdr[i] + 0x02 ,0x41 ); *//* Select Extended mode */ + r = (unsigned char) inp(portAdr[i] + 0x04); + if (divisor==0) + outp(portAdr[i] + 0x04,r & 0x7F);/* clear LOCK */ + else { + outp(portAdr[i] + 0x04,r | 0x90);/* LOCK,1.625 */ + outp(portAdr[i] , divisor ); + outp(portAdr[i] + 1, divisor >> 8 ); + } + outp(portAdr[i] + 0x03 , v); /* Restore LCR */ + } + } + v = (unsigned char)(inp(idnt[n].port+1)& (0x10 << (3*(i-1))) ); + if (opr == 'C') + print(("*Check EXCR2: %02x -- ",r)); + portStat[i] = v; + } /* for */ + _enable(); + break; +#endif + case 50: /* VIA */ + if (!portNo) { /* for interface match */ + portNo = 0xC0; + opr = 'D'; + } + _disable(); + i = via686a(portNo >> 6, + (opr == 'H' ? 2 : + (opr == 'L' ? 1 : 0 )), + &portAdr[1]); + _enable(); + portStat[1] = i & 0x40; + portStat[2] = i & 0x80; + for(i = 1; i < 2; i++) { + if (!portAdr[i]) + portStat[i] = -1; + } + break; + case 16: /* ITE IT86xx */ + case 17: /* ITE IT87xx */ + _disable(); + iop = idnt[n].type == 16 ? 0x279 : 0x02E; + outp(iop, idnt[n].id); + outp(iop, idnt[n].ini1); + outp(iop, idnt[n].ini2); + outp(iop, idnt[n].idx); + if(idnt[n].type == 16) + for(i = 0; i < 32; i++) + outp(idnt[n].port, pnpkey[i]); + + for(i = 1; i <= 2; i++) { + outp(idnt[n].port, 0x07); + outp(idnt[n].port+1, (UCH)i); /* UART# */ + outp(idnt[n].port, 0xF0); /* Config Reg. */ + v = (UCH) inp(idnt[n].port+1); +#ifdef DEBUG_ITE + printf("ITE UART%d Config = %02x\n", i, (int) v); +#endif + if((portNo & (0x20 << i)) /* 0x40 or 0x80 ? */ + && (opr == 'H' || opr == 'L')) { +#ifdef DEBUG_ITE + printf("%d: port = %02x, mode = %c\n", i, portNo, opr); +#endif + if (opr == 'H') + v |= 0x04; /* 0x04 */ + else if(opr == 'L') + v &= ~0x04; /* 0x04 */ + } + outp(idnt[n].port, 0xF0); /* Config Reg. */ + outp(idnt[n].port+1, v); + outp(idnt[n].port, 0xF0); /* Config Reg. */ + v = (UCH) inp(idnt[n].port+1); + portStat[i] = v & 0x40; +#ifdef DEBUG_ITE + printf("UART%d*Config = %02x\n", i, (int) v); +#endif + outp(idnt[n].port, 0x60); /* Addr Reg. */ + v = (UCH) inp(idnt[n].port+1); + portAdr[i] = (unsigned int) (v << 8); + outp(idnt[n].port, 0x61); /* Addr Reg. */ + v = (UCH) inp(idnt[n].port+1); + portAdr[i] |= v; + } +#if 0 /* for Sys-Clock Control test */ + outp(idnt[n].port, 0x23); /* Config Reg. */ + v = (UCH) inp(idnt[n].port+1); + printf(" Clock = %02x\n", (int) v); + if (mode == MODE_HI) { + outp(idnt[n].port, 0x23); + outp(idnt[n].port+1, (v | 0x01)); + } + else if (mode == MODE_LO) { + outp(idnt[n].port, 0x23); + outp(idnt[n].port+1, (v & ~0x01)); + } + outp(idnt[n].port, 0x23); /* Config Reg. */ + v = (UCH) inp(idnt[n].port+1); + printf("*Clock = %02x\n", (int) v); +#endif + /* finish */ + outp(idnt[n].port, idnt[n].fin); + outp(idnt[n].port+1, idnt[n].fin); + _enable(); + for(i = 1; i < 2; i++) { + if (!portAdr[i]) + portStat[i] = -1; + } + break; + } /* switch */ +#if defined(BIOSCOM) + warn = 0; + r = 0x01; + v = 0; + for (j = 1; j < 3; ++j, r <<= 1) { + printf("COM%d (%04xh): ", j, portAdr[j]); + bioscomp = (void *)0x400; + for(i = 0; i < 4; ++i,++bioscomp) { +#if 0 /* for debug*/ + printf("bios: %04lxh = %04lxh (%04lxh:%04lxh)\n", + bioscomp, (long) *bioscomp, + (long) portAdr[j], (long) portStat[j]); +#endif + if (*bioscomp != 0) { + if ((portAdr[j] == *bioscomp) && (portStat[j] >= 0)) { + printf("Supported, Mode = %s\n", + portStat[j]?"High":"Low" ); + if (portStat[j]) + v |= r; + break; + } + } + } + if (i >= 4) { + printf("Unsupported.\n"); + if (portAdr[j]) + warn++; + } + } + if ((idnt[n].type < 6) || (idnt[n].type >= 30)) /* SMC and ALI */ + return v; /* no problem */ + if ((idnt[n].type >= 6) && (idnt[n].type < 30)) { + /* if ( (*((char *)0x410) & 4) == 0) { */ + bioscomp = (void *)0x410; + if ( v == 0x03 && (*bioscomp & 4) == 0) { + printf("Warning -- Both ports are High Mode and PS/2 Mouse not equipped.\n"); + printf(" Can't use the serial mouse at High Mode.\n"); + printf(" You must set low for serial mouse port.\n"); + } + else if(*bioscomp & 4) + printf("Notify -- PS/2 Mouse detected(%02x, %04x)\n", v, *bioscomp); + } + if (warn) { + printf("Warning -- This system has unsupported UART chip or external serial chip.\n"); + printf(" The patch may cause problem.\n"); + } +#else + for (i=1;i<3;++i) { + print(("Port%d",i)); + if (portStat[i] >= 0) { + print(("(%04xh) Serial Speed Mode: %s\n", + portAdr[i],portStat[i]?"High":"Low")); + } else + print((" disabled\n")); + } +#endif + return v; +} diff -Nur linux-2.4.18/drivers/char/shstable.c linux-2.4.18shsmod/drivers/char/shstable.c --- linux-2.4.18/drivers/char/shstable.c Thu Jan 1 09:00:00 1970 +++ linux-2.4.18shsmod/drivers/char/shstable.c Fri Feb 21 02:51:40 2003 @@ -0,0 +1,228 @@ +/* + * SHSTABLE.C Version 2 */ + +#if (TVER==2) /* for TABLE VERSION CHECK */ +#ifndef _SHS_INTERNAL +#define _SHS_INTERNAL +#endif +#ifndef _SHS_CONST +#define _SHS_CONST +#endif +_SHS_INTERNAL +idn_t idnt[] = { + +/* port ini1 ini2 idx id rev fin pch type fab name */ +{ 0x3f0,0x01,0x02,0x03,TVER,0x02,0xFF, 0, -1, 0,"TableID"},/*00:Table ID */ + +{ 0x3f0,0x55,0x55,0x20,0x4c,0x01,0xAA,1,4,1,"FDC37B72x"}, /*01:B72x */ +{ 0x370,0x55,0x55,0x20,0x4c,0x01,0xAA,1,4,1,"FDC37B72x"}, /*02:B72x at 0x370*/ +{ 0x3f0,0x55,0x55,0x20,0x43,0x01,0xAA,1,4,1,"FDC37B77x"}, /*03:B77x */ +{ 0x370,0x55,0x55,0x20,0x43,0x01,0xAA,1,4,1,"FDC37B77x"}, /*04:B77x at 0x370*/ +{ 0x3f0,0x55,0x55,0x20,0x44,0x01,0xAA,1,4,1,"FDC37B78x"}, /*05:B78x */ +{ 0x370,0x55,0x55,0x20,0x44,0x01,0xAA,1,4,1,"FDC37B78x"}, /*06:B78x at 0x370*/ +{ 0x3f0,0x55,0x55,0x20,0x42,0x01,0xAA,1,4,1,"FDC37B80x"}, /*07:B80x */ +{ 0x370,0x55,0x55,0x20,0x42,0x01,0xAA,1,4,1,"FDC37B80x"}, /*08:B80x at 0x370*/ +{ 0x3f0,0x55,0x55,0x0d,0x65,0x02,0xAA,0,1,1,"FDC37C665GT"},/*09:C665GT */ +{ 0x3f0,0x44,0x44,0x0d,0x66,0x02,0xAA,0,1,1,"FDC37C666GT"},/*10:C666GT */ +{ 0x3f0,0x55,0x55,0x0d,0x65,0x82,0xAA,1,2,1,"FDC37C665IR"},/*11:C665IR */ +{ 0x3f0,0x44,0x44,0x0d,0x66,0x82,0xAA,1,2,1,"FDC37C666IR"},/*12:C666IR */ +{ 0x3f0,0x55,0x55,0x0d,0x03,0x00,0xAA,1,3,1,"FDC37C669" },/*13:C669 */ +{ 0x370,0x55,0x55,0x0d,0x03,0x00,0xAA,1,3,1,"FDC37C669" },/*14:C669 at 0x370*/ +{ 0x3f0,0x55,0x55,0x0d,0x04,0x00,0xAA,1,3,1,"FDC37C669FR"},/*15:C669FR */ +{ 0x370,0x55,0x55,0x0d,0x04,0x00,0xAA,1,3,1,"FDC37C669FR"},/*16:C669FR at 0x370*/ +{ 0x3f0,0x55,0x55,0x20,0x40,0x01,0xAA,1,4,1,"FDC37C67x" },/*17:C67x */ +{ 0x370,0x55,0x55,0x20,0x40,0x01,0xAA,1,4,1,"FDC37C67x" },/*18:C67x at 0x370*/ +{ 0x3f0,0x55,0x55,0x20,0x48,0x01,0xAA,1,4,1,"FDC37C68x" },/*19:C68x */ +{ 0x370,0x55,0x55,0x20,0x48,0x01,0xAA,1,4,1,"FDC37C68x" },/*20:C68x at 0x370*/ +{ 0x3f0,0x55,0x55,0x20,0x02,0x01,0xAA,1,4,1,"FDC37C93x" },/*21:C93x */ +{ 0x370,0x55,0x55,0x20,0x02,0x01,0xAA,1,4,1,"FDC37C93x" },/*22:C93x at 0x370*/ +{ 0x3f0,0x55,0x55,0x20,0x30,0x01,0xAA,1,4,1,"FDC37C93xAPM"},/*23:C93xAPM */ +{ 0x370,0x55,0x55,0x20,0x30,0x01,0xAA,1,4,1,"FDC37C93xAPM"},/*24:C93xAPM at 0x370*/ +{ 0x3f0,0x55,0x55,0x20,0x03,0x01,0xAA,1,4,1,"FDC37C93xFR"},/*25:C93xFR */ +{ 0x370,0x55,0x55,0x20,0x03,0x01,0xAA,1,4,1,"FDC37C93xFR"},/*26:C93xFR at 0x370*/ +{ 0x3f0,0x55,0x55,0x20,0x47,0x01,0xAA,1,4,1,"FDC37M60x" },/*27:M60x */ +{ 0x370,0x55,0x55,0x20,0x47,0x01,0xAA,1,4,1,"FDC37M60x" },/*28:M60x at 0x370*/ +{ 0x3f0,0x55,0x55,0x20,0x46,0x01,0xAA,1,4,1,"FDC37M61x" },/*29:M61x */ +{ 0x370,0x55,0x55,0x20,0x46,0x01,0xAA,1,4,1,"FDC37M61x" },/*30:M61x at 0x370*/ +{ 0x3f0,0x55,0x55,0x0d,0x28,0x00,0xAA,1,3,1,"FDC37N769" },/*31:N769FR */ +{ 0x370,0x55,0x55,0x0d,0x28,0x00,0xAA,1,3,1,"FDC37N769" },/*32:N769FR at 0x370*/ +{ 0x3f0,0x55,0x55,0x20,0x09,0x01,0xAA,1,4,1,"FDC37N958FR"},/*33:N958FR */ +{ 0x370,0x55,0x55,0x20,0x09,0x01,0xAA,1,4,1,"FDC37N958FR"},/*34:N958FR at 0x370*/ +#if 1 /*** added for 1.9 ***/ +/* deleted ? */ +{ 0x3f0,0x55,0x55,0x20,0x07,0x00,0xAA,1,4,1,"FDC37C957FR"},/*35:C957FR */ +{ 0x370,0x55,0x55,0x20,0x07,0x00,0xAA,1,4,1,"FDC37C957FR"},/*36:C957FR at 0x370*/ +/* same ID as B80 ?? */ +{ 0x3f0,0x55,0x55,0x20,0x42,0x00,0xAA,1,4,1,"FDC37M70x"}, /*37:M70x */ +{ 0x370,0x55,0x55,0x20,0x42,0x00,0xAA,1,4,1,"FDC37M70x"}, /*38:M70x at 0x370*/ +/* deleted ? */ +{ 0x3f0,0x55,0x55,0x20,0x43,0x00,0xAA,1,4,1,"FDC37M77x"}, /*39:M77x */ +{ 0x370,0x55,0x55,0x20,0x43,0x00,0xAA,1,4,1,"FDC37M77x"}, /*40:M77x at 0x370*/ +#endif +#if 1 +/* no function but detectable */ +{ 0x250,0x89,0x89,0x09,0x0a,0x01,0xAA,0,6,2,"W83877F"},/*41:W83877F 0x250*/ +{ 0x250,0x88,0x88,0x09,0x0a,0x01,0xAA,0,6,2,"W83877F"},/*42:W83877F 0x250*/ +{ 0x3F0,0x87,0x87,0x09,0x0a,0x01,0xAA,0,7,2,"W83877F"},/*43:W83877F 0x3f0*/ +{ 0x3F0,0x86,0x86,0x09,0x0a,0x01,0xAA,0,7,2,"W83877F"},/*44:W83877F 0x3f0*/ +#endif +{ 0x250,0x89,0x89,0x09,0x0c,0x00,0xAA,2,8,2,"W83877TF"},/*45:W83877TF 0x250*/ +{ 0x250,0x88,0x88,0x09,0x0c,0x00,0xAA,2,8,2,"W83877TF"},/*46:W83877TF 0x250*/ +{ 0x3F0,0x87,0x87,0x09,0x0c,0x00,0xAA,2,9,2,"W83877TF"},/*47:W83877TF 0x3f0*/ +{ 0x3F0,0x86,0x86,0x09,0x0c,0x00,0xAA,2,9,2,"W83877TF"},/*48:W83877TF 0x3f0*/ + +{ 0x3f0,0x87,0x87,0x20,0x97,0x71,0xAA,2,10,2,"W83977"},/*49:W83977 at 0x3f0*/ +{ 0x370,0x87,0x87,0x20,0x97,0x71,0xAA,2,10,2,"W83977"},/*50:W83977 at 0x370*/ +#if 1 +/* no function but detectable */ +{ 0x02e,0x00,0x00,0x08,0x90,0x00,0xAA,0,01,3,"87336"},/*51:PC87336 at 0x02e*/ +{ 0x15c,0x00,0x00,0x08,0x90,0x00,0xAA,0,01,3,"87336"},/*52:PC87336 at 0x15c*/ +{ 0x398,0x00,0x00,0x08,0x90,0x00,0xAA,0,01,3,"87336"},/*53:PC87336 at 0x398*/ +#endif +{ 0x02e,0x00,0x00,0x20,0xa0,0x00,0xAA,3,20,3,"87308"},/*54:PC87308 at 0x02e*/ +{ 0x15c,0x00,0x00,0x20,0xa0,0x00,0xAA,3,20,3,"87308"},/*55:PC87308 at 0x15c*/ +#if 1 /** defined(PC87338) **/ +{ 0x02e,0x00,0x00,0x08,0xb0,0x00,0xAA,3,28,3,"87338"},/*56:PC87338 at 0x02e*/ +{ 0x15c,0x00,0x00,0x08,0xb0,0x00,0xAA,3,28,3,"87338"},/*57:PC87338 at 0x15c*/ +{ 0x398,0x00,0x00,0x08,0xb0,0x00,0xAA,3,28,3,"87338"},/*58:PC87338 at 0x398*/ +#endif +{ 0x02e,0x00,0x00,0x20,0xc0,0x00,0xAA,3,22,3,"87307"},/*59:PC87307 at 0x02e*/ +{ 0x15c,0x00,0x00,0x20,0xc0,0x00,0xAA,3,22,3,"87307"},/*60:PC87307 at 0x15c*/ +{ 0x02e,0x00,0x00,0x20,0xcf,0x00,0xAA,3,21,3,"97307"},/*61:PC97307 at 0x02e*/ +{ 0x15c,0x00,0x00,0x20,0xcf,0x00,0xAA,3,21,3,"97307"},/*62:PC97307 at 0x15c*/ +{ 0x02e,0x00,0x00,0x20,0xd0,0x00,0xAA,3,22,3,"87317"},/*63:PC87317 at 0x02e*/ +{ 0x15c,0x00,0x00,0x20,0xd0,0x00,0xAA,3,22,3,"87317"},/*64:PC87317 at 0x15c*/ +{ 0x02e,0x00,0x00,0x20,0xdf,0x00,0xAA,3,21,3,"97317"},/*65:PC87317 at 0x02e*/ +{ 0x15c,0x00,0x00,0x20,0xdf,0x00,0xAA,3,21,3,"97317"},/*66:PC87317 at 0x15c*/ +{ 0x02e,0x00,0x00,0x20,0xe0,0x00,0xAA,3,23,3,"87309"},/*67:PC87309 at 0x02e*/ +{ 0x15c,0x00,0x00,0x20,0xe0,0x00,0xAA,3,23,3,"87309"},/*68:PC87309 at 0x15c*/ +{ 0x3f0,0x51,0x23,0x20,0x43,0x15,0xBB,1,30,4,"M1543"},/*69:M1543 at 0x3f0 */ +{ 0x370,0x51,0x23,0x20,0x43,0x15,0xBB,1,30,4,"M1543"},/*70:M1543 at 0x370 */ +{ 0x3f0,0x51,0x23,0x20,0x33,0x51,0xBB,1,30,4,"M5133"},/*71:M5133 at 0x3f0 */ +{ 0x370,0x51,0x23,0x20,0x33,0x51,0xBB,1,30,4,"M5133"},/*72:M5133 at 0x370 */ +{ 0x3f0,0x87,0x87,0x20,0x52,0xF0,0xAA,2,10,2,"W83977EF"},/*73:W83977EF 0x3f0*/ +{ 0x370,0x87,0x87,0x20,0x52,0xF0,0xAA,2,10,2,"W83977EF"},/*74:W83977EF 0x370*/ +{ 0x3f0,0x51,0x23,0x20,0x43,0x15,0xBB,1,31,4,"M1543C"}, /*75:M1543 at 0x3f0*/ +{ 0x370,0x51,0x23,0x20,0x43,0x15,0xBB,1,31,4,"M1543C"}, /*76:M1543 at 0x370*/ +{ 0x3f0,0x87,0x87,0x20,0x97,0x73,0xAA,2,10,2,"W83977TF"},/*77:W83977TF/ATF 3f0*/ +{ 0x370,0x87,0x87,0x20,0x97,0x73,0xAA,2,10,2,"W83977TF"},/*78:W83977TF/ATF 370*/ +{ 0x3f0,0x87,0x87,0x20,0x97,0x74,0xAA,2,10,2,"W83977ATF"},/*79:W83977ATF 3f0*/ +{ 0x370,0x87,0x87,0x20,0x97,0x74,0xAA,2,10,2,"W83977ATF"},/*80:W83977ATF 370*/ +{ 0x3f0,0x87,0x87,0x20,0x52,0x70,0xAA,2,10,2,"W83977CTF"},/*81:W83977CTF 3f0*/ +{ 0x370,0x87,0x87,0x20,0x52,0x70,0xAA,2,10,2,"W83977CTF"},/*82:W83977CTF 370*/ +{ 0x3f0,0x87,0x87,0x20,0x52,0x10,0xAA,2,10,2,"W83627HF/F"},/*83:W83627HF/F 3f0*/ +{ 0x370,0x87,0x87,0x20,0x52,0x10,0xAA,2,10,2,"W83627HF/F"},/*84:W83627HF/F 370*/ +{ 0x02e,0x87,0x87,0x20,0x52,0x10,0xAA,2,10,2,"W83627HF/F"},/*85:W83627HF/F 02E*/ +{ 0x04e,0x87,0x87,0x20,0x52,0x10,0xAA,2,10,2,"W83627HF/F"},/*86:W83627HF/F 04E*/ +{ 0x02e,0x87,0x87,0x20,0x60,0x10,0xAA,2,10,2,"W83697HF"},/*87:W83697HF at 02e */ +{ 0x04e,0x87,0x87,0x20,0x60,0x10,0xAA,2,10,2,"W83697HF"},/*88:W83697HF at 04e */ +/* Those are no revision check for Winbond */ +{ 0x250,0x89,0x89,0x09,0x0d,0x00,0xAA,2,8,2,"W83877?TF?"},/*89:W83877?TF 250*/ +{ 0x250,0x88,0x88,0x09,0x0d,0x00,0xAA,2,8,2,"W83877?TF?"},/*90:W83877?TF 250*/ +{ 0x3F0,0x87,0x87,0x09,0x0d,0x00,0xAA,2,9,2,"W83877?TF?"},/*91:W83877?TF 3f0*/ +{ 0x3F0,0x86,0x86,0x09,0x0d,0x00,0xAA,2,9,2,"W83877?TF?"},/*92:W83877?TF 3f0*/ +{ 0x3f0,0x87,0x87,0x20,0x97,0x00,0xAA,2,10,2,"W83977F/?TF?"},/*93:W83977 3f0*/ +{ 0x370,0x87,0x87,0x20,0x97,0x00,0xAA,2,10,2,"W83977F/?TF?"},/*94:W83977 370*/ +{ 0x3f0,0x87,0x87,0x20,0x52,0x00,0xAA,2,10,2,"W83977EF/?F?"},/*95:W83977EF 3f0*/ +{ 0x370,0x87,0x87,0x20,0x52,0x00,0xAA,2,10,2,"W83977EF/?F?"},/*96:W83977EF 370*/ +{ 0x3f0,0x87,0x87,0x20,0x52,0x00,0xAA,2,10,2,"W83627HF/?"},/*97:W83627HF/F 3f0*/ +{ 0x370,0x87,0x87,0x20,0x52,0x00,0xAA,2,10,2,"W83627HF/?"},/*98:W83627HF/F 370*/ +{ 0x02e,0x87,0x87,0x20,0x52,0x00,0xAA,2,10,2,"W83627HF/?"},/*99:W83627HF/F 02E*/ +{ 0x04e,0x87,0x87,0x20,0x52,0x00,0xAA,2,10,2,"W83627HF/?"},/*100:W83627HF 04E*/ +{ 0x02e,0x87,0x87,0x20,0x60,0x00,0xAA,2,10,2,"W83697HF?"},/*101:W83697HF 02e */ +{ 0x04e,0x87,0x87,0x20,0x60,0x00,0xAA,2,10,2,"W83697HF?"},/*102:W83697HF 04e */ + +{ 0x3F0,0x00,0x00,0xE0,0x3C,0x00,0x00,1,50,5,"VT82C686A|B"},/*103:VT82C686A 3F0 */ + +{ 0x02E,0x01,0x55,0x55,0x87,0x00,0x02,0,17,6,"IT87xx/SiS950"},/*104:ITE */ +{ 0x04E,0x01,0x55,0xAA,0x87,0x00,0x02,0,17,6,"IT87xx/SiS950"},/*105:ITE */ +{ 0x02E,0x61,0x55,0x55,0x87,0x00,0x02,2,17,6,"IT8761"},/*106:ITE */ +{ 0x04E,0x61,0x55,0xAA,0x87,0x00,0x02,2,17,6,"IT8761"},/*107:ITE */ +{ 0x02E,0x80,0x55,0x55,0x87,0x00,0x02,2,17,6,"IT878?"},/*108:ITE -- TEST */ +{ 0x04E,0x80,0x55,0xAA,0x87,0x00,0x02,2,17,6,"IT878?"},/*109:ITE -- TEST */ + +{ 0x3F0,0x80,0x55,0x55,0x86,0x00,0x02,0,16,6,"IT867x/8x"},/*110:ITE */ +{ 0x3BD,0x80,0x55,0xAA,0x86,0x00,0x02,0,16,6,"IT867x/8x"},/*111:ITE */ +{ 0x370,0x80,0xAA,0x55,0x86,0x00,0x02,0,16,6,"IT867x/8x"},/*112:ITE */ +{ 0x3F0,0x61,0x55,0x55,0x86,0x00,0x02,0,16,6,"IT8661/compat"},/*113:ITE */ +{ 0x3BD,0x61,0x55,0xAA,0x86,0x00,0x02,0,16,6,"IT8661/compat"},/*114:ITE */ +{ 0x370,0x61,0xAA,0x55,0x86,0x00,0x02,0,16,6,"IT8661/compat"},/*115:ITE */ + +{ 0x3f0,0x51,0x23,0x20,0x53,0x15,0xBB,1,31,4,"M1535D+"}, /*116:M1535D+ at 0x3f0*/ +{ 0x370,0x51,0x23,0x20,0x53,0x15,0xBB,1,31,4,"M1535D+"}, /*117:M1535D+ at 0x370*/ + +{ 0x3f0,0x55,0x55,0x20,0x4D,0x00,0xAA,1,4,1,"FDC37M81x"}, /*118:M81x */ +{ 0x370,0x55,0x55,0x20,0x4D,0x00,0xAA,1,4,1,"FDC37M81x"}, /*119:M81x at 0x370*/ +{ 0x3f0,0x55,0x55,0x0d,0x29,0x00,0xAA,1,3,1,"FDC37N3869" },/*120:N3869 */ +{ 0x370,0x55,0x55,0x0d,0x29,0x00,0xAA,1,3,1,"FDC37N3869" },/*121:N3869 at 0x370*/ + +{ 0x02E,0x55,0x55,0x20,0x59,0x00,0xAA,1,4,1,"LPC47M10x/13x"}, /*122:M81x */ +{ 0x04E,0x55,0x55,0x20,0x59,0x00,0xAA,1,4,1,"LPC47M10x/13x"}, /*123:M81x at 0x370*/ +{ 0x02E,0x55,0x55,0x20,0x5C,0x00,0xAA,1,4,1,"LPC47M120"}, /*124:M81x */ +{ 0x04E,0x55,0x55,0x20,0x5C,0x00,0xAA,1,4,1,"LPC47M120"}, /*125:M81x at 0x370*/ +{ 0x02E,0x55,0x55,0x20,0x5F,0x00,0xAA,1,4,1,"LPC47M14x"}, /*126:M81x */ +{ 0x04E,0x55,0x55,0x20,0x5F,0x00,0xAA,1,4,1,"LPC47M14x"}, /*127:M81x at 0x370*/ +{ 0x02E,0x55,0x55,0x20,0x60,0x00,0xAA,1,4,1,"LPC47M15x/192"}, /*128:M81x */ +{ 0x04E,0x55,0x55,0x20,0x60,0x00,0xAA,1,4,1,"LPC47M15x/192"}, /*129:M81x at 0x370*/ +{ 0x02E,0x55,0x55,0x0d,0x5A,0x00,0xAA,1,3,1,"LPC47N227" },/*130:N3869 */ +{ 0x04E,0x55,0x55,0x0d,0x5A,0x00,0xAA,1,3,1,"LPC47N227" },/*131:N3869 at 0x370*/ +{ 0x02E,0x55,0x55,0x20,0x51,0x00,0xAA,1,4,1,"LPC47B27x"}, /*132:M81x */ +{ 0x04E,0x55,0x55,0x20,0x51,0x00,0xAA,1,4,1,"LPC47B27x"}, /*133:M81x at 0x370*/ +{ 0x02E,0x55,0x55,0x20,0x52,0x00,0xAA,1,4,1,"LPC47B37x"}, /*134:M81x */ +{ 0x04E,0x55,0x55,0x20,0x52,0x00,0xAA,1,4,1,"LPC47B37x"}, /*135:M81x at 0x370*/ +{ 0x02E,0x55,0x55,0x20,0x14,0x00,0xAA,0,5,1,"LPC47M172"}, /*136:M81x */ +{ 0x04E,0x55,0x55,0x20,0x14,0x00,0xAA,0,5,1,"LPC47M172"}, /*137:M81x at 0x370*/ +{ 0x02E,0x55,0x55,0x0d,0x13,0x00,0xAA,1,3,1,"LPC47N237" },/*138:N3869 */ +{ 0x04E,0x55,0x55,0x0d,0x13,0x00,0xAA,1,3,1,"LPC47N237" },/*139:N3869 at 0x370*/ + +{ 0x02e,0x87,0x87,0x20,0x59,0x50,0xAA,2,10,2,"W83627SF"}, /*140:W83627SF 02E*/ +{ 0x04e,0x87,0x87,0x20,0x59,0x50,0xAA,2,10,2,"W83627SF"}, /*150:W83627SF 04E*/ +{ 0x02e,0x87,0x87,0x20,0x59,0x00,0xAA,2,10,2,"W83627?F"}, /*140:W83627? 02E*/ +{ 0x04e,0x87,0x87,0x20,0x59,0x00,0xAA,2,10,2,"W83627?F"}, /*150:W83627? 04E*/ +{ 0x02e,0x87,0x87,0x20,0x68,0x10,0xAA,2,10,2,"W83697UF"}, /*160:W83697UF 02E*/ +{ 0x04e,0x87,0x87,0x20,0x68,0x10,0xAA,2,10,2,"W83697UF"}, /*161:W83697UF 04E*/ +{ 0x02e,0x87,0x87,0x20,0x68,0x50,0xAA,2,10,2,"W83697SF"}, /*162:W83697SF 02E*/ +{ 0x04e,0x87,0x87,0x20,0x68,0x50,0xAA,2,10,2,"W83697SF"}, /*163:W83697SF 04E*/ +{ 0x02e,0x87,0x87,0x20,0x68,0x00,0xAA,2,10,2,"W83697?F"}, /*162:W83697? 02E*/ +{ 0x04e,0x87,0x87,0x20,0x68,0x00,0xAA,2,10,2,"W83697?F"}, /*163:W83697? 04E*/ +{ 0x02e,0x87,0x87,0x20,0x70,0x80,0xAA,2,10,2,"W83637HF"}, /*164:W83637HF 02E*/ +{ 0x04e,0x87,0x87,0x20,0x70,0x80,0xAA,2,10,2,"W83637HF"}, /*165:W83637HF 04E*/ +{ 0x02e,0x87,0x87,0x20,0x70,0x00,0xAA,2,10,2,"W83637?F"}, /*164:W83637? 02E*/ +{ 0x04e,0x87,0x87,0x20,0x70,0x00,0xAA,2,10,2,"W83637?F"}, /*165:W83637 04E*/ + +{ 0, 0, 0, 0, 0, 0, 0, 0,0, 0,"Other" } +}; + +_SHS_INTERNAL _SHS_CONST +char *fab[] = { +/*0*/ "nowhere ", +/*1*/ "SMSC ", +/*2*/ "Winbond ", +/*3*/ "NS PC", +/*4*/ "ALI ", +/*5*/ "VIA ", +/*6*/ "ITE ", + NULL +}; + +_SHS_INTERNAL _SHS_CONST +unsigned char pnpkey[32] = { +0x6A, 0xB5, 0xDA, 0xED, 0xF6, 0xFB, 0x7D, 0xBE, +0xDF, 0x6F, 0x37, 0x1B, 0x0D, 0x86, 0xC3, 0x61, +0xB0, 0x58, 0x2C, 0x16, 0x8B, 0x45, 0xA2, 0xD1, +0xE8, 0x74, 0x3A, 0x9D, 0xCE, 0xE7, 0x73, 0x39 +}; + + +#ifdef DEBUG_CONFIG_SHSMOD + +_SHS_INTERNAL _SHS_CONST +char *xxxx = "XXXX"; + +#endif + +/* END of SHSTABLE */ + +#undef _SHS_INTERNAL +#undef _SHS_CONST +#endif /* TVER == 2 */ diff -Nur linux-2.4.18/drivers/char/shstable.h linux-2.4.18shsmod/drivers/char/shstable.h --- linux-2.4.18/drivers/char/shstable.h Thu Jan 1 09:00:00 1970 +++ linux-2.4.18shsmod/drivers/char/shstable.h Fri Feb 21 02:51:40 2003 @@ -0,0 +1,25 @@ +/* + * SHSTABLE.H Version 2 */ + +#ifndef _SHSTABLE_H + +#define _SHSTABLE_H +#define _SHS_HEADER + +#define TVER 0x02 + +typedef struct idn { + unsigned short port; + unsigned char ini1; + unsigned char ini2; + unsigned char idx; + unsigned char id; + unsigned char rev; + unsigned char fin; + int pch; + int type; + int fab; /*** Added for V2 ***/ + char *name; +} idn_t; + +#endif /* ndef _SHSTABLE_H */