IOP Project Status | |||
Project File: | IOP.ise | Current State: | Programming File Generated |
Module Name: | IOP |
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Target Device: | xc3s400-4fg456 |
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Product Version: | ISE 9.1.03i |
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? 9 6 20:31:55 2007 |
IOP Partition Summary | |||
No partition information was found. |
Device Utilization Summary | ||||
Logic Utilization | Used | Available | Utilization | Note(s) |
Number of Slice Flip Flops | 21 | 7,168 | 1% | |
Number of 4 input LUTs | 7 | 7,168 | 1% | |
Logic Distribution | ||||
Number of occupied Slices | 15 | 3,584 | 1% | |
Number of Slices containing only related logic | 15 | 15 | 100% | |
Number of Slices containing unrelated logic | 0 | 15 | 0% | |
Total Number of 4 input LUTs | 26 | 7,168 | 1% | |
Number used as logic | 7 | |||
Number used as a route-thru | 19 | |||
Number of bonded IOBs | 254 | 264 | 96% | |
Number of GCLKs | 1 | 8 | 12% | |
Total equivalent gate count for design | 348 | |||
Additional JTAG gate count for IOBs | 12,192 |
Performance Summary | |||
Final Timing Score: | 0 | Pinout Data: | Pinout Report |
Routing Results: | All Signals Completely Routed | Clock Data: | Clock Report |
Timing Constraints: | All Constraints Met |
Detailed Reports | |||||
Report Name | Status | Generated | Errors | Warnings | Infos |
Synthesis Report | Current | ? 9 6 20:30:10 2007 | |||
Translation Report | Current | ? 9 6 20:30:29 2007 | |||
Map Report | Current | ? 9 6 20:30:45 2007 | |||
Place and Route Report | Current | ? 9 6 20:31:09 2007 | |||
Static Timing Report | Current | ? 9 6 20:31:16 2007 | |||
Bitgen Report | Current | ? 9 6 20:31:43 2007 |